Integrated circuits (ICs), such as processor chips for computer systems and the like, are continually being required to perform more functions or operations and to perform these operations at ever increasing speeds. As performance requirements have increased, so have the power requirements for these devices to operate properly and efficiently. Current and future high performance processors may require as much as 100 amperes of current or more. This presents challenges to designers of packaging for such ICs or chips and designers of test systems for testing and evaluating such high performance ICs to supply high current at relatively low voltages to power the ICs with little if any added resistance or inductance that would adversely affect the power requirements of the IC and with minimal noise interference that could adversely affect performance.
Accordingly, there is a need for a connector system for high power, high performance ICs that reduces voltage drop and settling time and decouples or reduces noise interference to the IC.